Tsmc Standard Cell Naming Convention May 2026

Older nodes (e.g., 180nm, 130nm) may use SVT (Standard Vt) instead of RVT. 3.4 Physical Variant Modifiers These indicate special layout arrangements.

INVX4 drives four times stronger than INVX1 . 3.3 Threshold Voltage (Vt) TSMC offers multiple Vt options to trade leakage power vs. speed.

<Base Function> <Drive Strength> <Threshold Voltage> <Physical Variant> <Metal/Pitch Variant> Or more concretely: tsmc standard cell naming convention

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| Field | Example codes | |--------------|----------------------------------------| | Function | INV, NAND2, DFFR, AOI21 | | Drive | X0.5, X1, X2, X4, X8, X16 | | Vt | LVT, RVT, HVT, ULVT, ELVT | | Physical | _D, _P, _F, _CK, _ISO, _LS | | Track height | 6T, 7.5T, 9T (node dependent) | Older nodes (e

| Code | Relative drive | |------|----------------| | X0.5 | Ultra-weak | | X1 | Unit drive | | X2 | 2× unit | | X4 | 4× unit | | X8 | 8× unit | | X16 | Max drive |

| Code | Vt type | Speed | Leakage | |-------|----------------|-------|---------| | LVT | Low Vt | Fast | High | | RVT | Regular Vt | Medium| Medium | | HVT | High Vt | Slow | Low | | ULVT | Ultra-low Vt | Fastest| Highest | | ELVT | Extreme low Vt | (deprecated in some nodes) | | AOI21 | | Drive | X0.5

| Code | Meaning | |-----------|--------------------------------------------------------| | (none) | Regular height, standard pin placement | | _D | Double-height cell (for higher drive or reduced IR drop) | | _P | Pin access optimization (better routing) | | _F | Flip-pin (mirrored for abutment) | | _CK | Clock-specific cell (low jitter) | | _ISO | Isolation cell (power gating) | | _LS | Level shifter | | _RO | Ring oscillator cell (test) | In N7, N5, N3, TSMC uses multiple metal track heights.