// 2. Configure SEMC registers for NAND (timings, bus width) semc_set_nand_timings(priv);
struct semc_nand *priv; struct nand_chip *chip; // 1. Request memory region and clock priv->base = devm_platform_ioremap_resource(pdev, 0); priv->clk = devm_clk_get(&pdev->dev, "semc"); clk_prepare_enable(priv->clk); semc flash device driver
// 3. Initialize NAND controller and assign controller ops chip->controller = &priv->controller; chip->select_chip = semc_nand_select; chip->cmd_ctrl = semc_nand_cmd_ctrl; chip->dev_ready = semc_nand_dev_ready; bus width) semc_set_nand_timings(priv)
static int semc_nand_probe(struct platform_device *pdev) struct semc_nand *priv